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MP611 VL/787VL

UNIDENTIFIED

MP611 VL/787VL

Data bus:

32-bit VL-bus

Size:

Unidentified

Hard drive supported:

Two IDE(AT) drives

Floppy drives supported:

Two 360KB, 720KB, 1.2MB, or 1.44MB drives

 

DIAGRAM NOT AVAILABLE

DOC # C0889

CONNECTIONS

Function

Location

40-pin IDE(AT) connector

unidentified

34-pin cable connector - floppy drive

unidentified

Serial port 1

unidentified

Serial port 2 l

unidentified

25-pin parallel port - external

unidentified

Drive active LED

JP4

USER CONFIGURABLE SETTINGS

Function

Location

Setting

IDE(AT) interface enabled

JP5/Pins 1 & 2

closed

 

IDE(AT) interface disabled

JP5/pins 2 & 3

closed

Factory configured - do not alter

JP6/pins 1 & 2

closed

 

IDE ID# is bit1

JP7/pins 1 & 2

closed

 

IDE ID# is bit0

JP8/pins 2 & 3

closed

RDYRTN# signal source is LRDY#

JP9/pins 2 & 3

closed

 

RDYRTN# signal source is CPURDY#

JP9/pins 1 & 2

closed

IDE(AT) IRQ 14 enabled

JP10

closed

 

IDE(AT) IRQ 14 disabled

JP10

open

Floppy drive interface enabled

JP17/pins 1 & 2

closed

 

Floppy drive interface disabled

JP17/pins 2 & 3

closed

Floppy drive address is 370-377h

JP18/pins 1 & 2

closed

 

Floppy drive address is 3F0-3F7h

JP18/pins 2 & 3

closed

Parallel port is bi-directional

JP19

open

 

Parallel port is uni-directional

JP19

closed

SERIAL PORT 1 ADDRESS SELECTION

COM

JP14

JP15

COM1 (3F8h)

pins 1 & 2 closed

pins 2 & 3 closed

COM3 (3E8h)

pins 2 & 3 closed

pins 1 & 2 closed

COM4 (2E8h)

pins 1 & 2 closed

pins 1 & 2 closed

Disabled

pins 2 & 3 closed

pins 2 & 3 closed

SERIAL PORT 2 ADDRESS SELECTION

COM

JP11

JP16

COM2 (2F8h)

pins 2 & 3 closed

pins 1 & 2 closed

COM3 (3E8h)

pins 1 & 2 closed

pins 1 & 2 closed

COM4 (2E8h)

pins 1 & 2 closed

pins 2 & 3 closed

Disabled

pins 2 & 3 closed

pins 2 & 3 closed

PARALLEL PORT ADDRESS SELECTION

LPT

JP12

JP13

LPT1 (378h)

pins 2 & 3 closed

pins 1 & 2 closed

LPT2 (278h)

pins 1 & 2 closed

pins 2 & 3 closed

LPT3 (3BCh)

pins 1 & 2 closed

pins 1 & 2 closed

Disabled

pins 2 & 3 closed

pins 2 & 3 closed

SERIAL PORT 1 INTERRUPT SELECTION

IRQ

J7/Pins 1 & 9

J7/Pins 2 & 10

J7/Pins 3 & 11

3

open

closed

open

4

closed

open

open

5

open

open

closed

SERIAL PORT 2 INTERRUPT SELECTION

IRQ

J7/Pins 4 & 12

J7/Pins 5 & 13

J7/Pins 6 & 14

3

closed

open

open

4

open

closed

open

5

open

open

closed

PARALLEL PORT INTERRUPT SELECTION

IRQ

J7/Pins 7 & 15

J7/Pins 8 & 16

7

closed

open

5

open

closed

MISCELLANEOUS TECHNICAL NOTES

JP1 controls wait-state bit2, JP2 controls wait-state bit 1. Exact setting are unidentified.