...because we can't all be on the bleeding edge...





CH-386-33F/40F

CHICONY, INC.

CH-386-33F/40F

Processor

80386DX

Processor Speed

33/40MHz

Chip Set

OPTI

Max. Onboard DRAM

32MB

Cache

32/64/128/256KB

BIOS

AMI

Dimensions

254mm x 218mm

I/O Options

None

NPU Options

80387DX/3167

CONNECTIONS

Purpose

Location

Purpose

Location

External battery

J1

Reset switch

J18

Power LED & keylock

J16

Turbo switch

J19

Speaker

J17

Turbo LED

J20

USER CONFIGURABLE SETTINGS

Function

Jumper

Position

CMOS memory normal operation

J2

Closed

 

CMOS memory clear

J2

Open

Monitor type select monochrome

J4

Open

 

Monitor type select color

J4

Closed

DRAM CONFIGURATION

Size

Bank 0

Bank 1

1MB

(4) 256K x 9

NONE

2MB

(4) 256K x 9

(4) 256K x 9

4MB

(4) 1M x 9

NONE

5MB

(4) 256K x 9

(4) 1M x 9

8MB

(4) 1M x 9

(4) 1M x 9

16MB

(4) 4M x 9

NONE

17MB

(4) 256K x 9

(4) 4M x 9

20MB

(4) 1M x 9

(4) 4M x 9

32MB

(4) 4M x 9

(4) 4M x 9

CACHE CONFIGURATION

Size

Bank 0

Bank 1

TAG (U19)

TAG (U20

32KB

(4) 8K x 8

NONE

(1) 16K x 4

(1) 8K x 8

64KB

(4) 8K x 8

(4) 8K x 8

(1) 16K x 4

(1) 8K x 8

128KB

(4) 32K x 8

NONE

(1) 16K x 4

(1) 8K x 8

256KB

(4) 32K x 8

(4) 32K x 8

(1) 16K x 4

(1) 32K x 8

CACHE JUMPER CONFIGURATION

Size

J6

J7

J8

J9

J11

J12

J13

J15

32KB

Open

1 & 2

1 & 2

1 & 2

Open

Open

Open

4 & 5

64KB

Open

1 & 2

1 & 2

2 & 3

Closed

Open

Open

1 & 2

128KB

Closed

1 & 2

2 & 3

2 & 3

Closed

Open

Closed

4 & 5

256KB

Closed

2 & 3

2 & 3

2 & 3

Closed

Closed

Closed

5 & 6

Note: Pins designated should be in the closed position.

CACHE TAG BIT CONFIGURATION

Size

Bit size

J10

32KB

7

Open

32KB

8

pins 1 & 2 closed

64KB

7

Open

64KB

8

pins 5 & 6 closed

128KB

7

Open

128KB

8

pins 4 & 5 closed

256KB

7

Open

256KB

8

pins 2 & 3 closed

CACHE TAG BIT CONFIGURATION

Size

J3

J14

7 bit

Open

pins 1 & 2 closed

8 bit

Closed

pins 2 & 3 closed