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ILC VL3/486

INTERCOMP, INC.

ILC VL3/486

Processor

80386DX/CX486DLC/80486SX/80486DX/80486DX2

Processor Speed

16/20/25/33/40/50/66(Internal)MHz

Chip Set

Intercomp

Max. onboard DRAM

128MB

Cache

64/128/256KB

BIOS

AMI

Dimensions

330mm x 218mm

I/O Options

32-bit VESA local bus slots (2)

NPU Options

80387DX

CONNECTIONS

Purpose

Location

Purpose

Location

External battery

P1

Turbo LED

P16

Speaker

P13

Turbo switch

P17

Power LED & keylock

P14

32-bit VESA local bus slot

S1

Reset switch

P15

32-bit VESA local bus slot

S2

USER CONFIGURABLE SETTINGS

Function

Jumper

Position

CMOS memory normal operation (Internal Battery)

P2

pins 2 & 3 closed

 

CMOS memory normal operation (External Battery)

P2

pins 1 & 2 closed

 

CMOS memory clear

P2

pins 3 & 4 closed

80486/50MHz CPU enabled

P3

Closed

 

80486/50Mhz CPU disabled

P3

Open

Factory configured do not alter

P4

Open

Bus type select VESA

P7

pins 1 & 2, 3 & 4 open

 

Bus type select ISA

P7

pins 1 & 2, 3 & 4 closed

VESA local bus enabled

P10

pins 1 & 2 closed

 

VESA local bus disabled

P10

pins 2 & 3 closed

Factory configured do not alter

P12

pins 3 & 6 closed

NPU disabled

P20

pins 2 & 3 closed

 

NPU enabled

P20

pins 1 & 2 closed

DRAM CONFIGURATION

Size

Bank 0

Bank 1

1MB

(4) 256K x 9

NONE

2MB

(4) 256K x 9

(4) 256K x 9

4MB

(4) 1M x 9

NONE

5MB

(4) 256K x 9

(4) 1M x 9

8MB

(4) 1M x 9

(4) 1M x 9

16MB

(4) 4M x 9

NONE

17MB

(4) 256K x 9

(4) 4M x 9

20MB

(4) 1M x 9

(4) 4M x 9

32MB

(4) 4M x 9

(4) 4M x 9

64MB

(4) 16M x 9

NONE

65MB

(4) 256K x 9

(4) 16M x 9

68MB

(4) 1M x 9

(4) 16M x 9

80MB

(4) 4M x 9

(4) 16M x 9

128MB

(4) 16M x 9

(4) 16M x 9

Note: If SIMMs on bank 0 are not present SIMMs located on bank 1 will be automatically re-mapped to Bank O.

SRAM CONFIGURATION

Size

Cache

Location

TAG

Dirty bit U38

64KB

(8) 8K x 8

Banks 0 & 1

(1) 8K x 8

(1) 16K x 4

128KB

(4) 32K x 8

Bank 0

(1) 8K x 8

(1) 16K x 4

256KB

(8) 32K x 8

Banks 0 & 1

(1) 32K x 8

(1) 16K x 4

SRAM JUMPER CONFIGURATION

CACHE Size

Main Memory

P5

P6

64KB

£ 16MB

pins 1 & 2, 4 & 5, 7 & 8 closed

pins 1 & 2, 4 & 5 closed

64KB

> 16MB, £ =32MB

pins 1 & 2, 4 & 5, 7 & 8 closed

pins 1 & 2, 4 & 5 closed

128KB

£ 32MB

pins 2 & 3, 4 & 5, 8 & 9 closed

pins 2 & 3, 4 & 5 closed

128KB

> 32MB, £ =64MB

pins 2 & 3, 4 & 5, 7 & 8 closed

pins 2 & 3, 4 & 5 closed

256KB

£ 32MB

pins 2 & 3, 5 & 6, 8 & 9 closed

pins 2 & 3, 5 & 6 closed

256KB

> 32MB, £ =64MB

pins 2 & 3, 5 & 6, 7 & 8 closed

pins 2 & 3, 5 & 6 closed

CPU SPEED CONFIGURATION

Speed

P3

P19

80386DX/16/20/25

Open

pins 1 & 5, 2 & 6, 4 & 8 closed

80386DX/33

Open

pins 1 & 5, 3 & 7, 4 & 8 closed

CX486DLC/40

Open

pins 1 & 5, 2 & 6 closed

80486SX/20

Open

pins 2 & 6, 3 & 7 closed

80486SX/25

Open

pins 2 & 6, 4 & 8 closed

80486DX25

Open

pins 2 & 6, 4 & 8 closed

80486DX33

Open

pins 3 & 7, 4 & 8 closed

80486DX50

Closed

pins 3 & 7 closed

80486DX2/66

Open

pins 3 & 7, 4 & 8 closed

CPU TYPE CONFIGURATION

CPU

P10

P11

P18

P21

80386DX

pins 2 & 3 closed

Open

Open

Closed

80486SX

pins 1 & 2 closed

pins 1 & 2 closed

Closed

Open

80486DX

pins 1 & 2 closed

pins 2 & 3 closed

Closed

Open

80486DX2

pins 1 & 2 closed

pins 2 & 3 closed

Closed

Open