Processor	Pentium
Processor Speed	50/60/66MHz
Chip Set	FOREX
Max. Onboard DRAM	128MB
Cache	64/128/256/512/1024/2048KB
BIOS	AMI
Dimensions	330mm x 218mm
I/O Options	32-bit VESA local bus slots (3), green PC connector
NPU Options	None

CONNECTIONS
Purpose	Location	Purpose	Location
External battery	J2	Turbo switch	J5 pins 16 - 17
Green PC connector (monitor)	J3	Reset switch	J5 pins 19 - 20
Power LED & keylock	J5 pins 1 - 5	Green PC connector	JP2
Speaker	J5 pins 7 - 10	Green PC connector	JP4
Turbo LED	J5 pins 11 - 12	32-bit VESA local bus slots	SL1 - SL3

USER CONFIGURABLE SETTINGS
Function		Jumper	Position
»	CMOS memory normal operation	JP1	Open
	CMOS memory clear	JP1	Closed
»	Factory configured - do not alter	JP3	N/A
Note: The location of JP3 is unidentified.

DRAM CONFIGURATION
Size	Bank 0	Bank 1	Bank 2	Bank 3
2MB	(1) 256K x 36	(1) 256K x 36	NONE	NONE
4MB	(1) 256K x 36	(1) 256K x 36	(1) 256K x 36	(1) 256K x 36
4MB	(1) 512K x 36	(1) 512K x 36	NONE	NONE
4MB	(1) 1M x 36	NONE	NONE	NONE
6MB	(1) 256K x 36	(1) 256K x 36	(1) 512K x 36	(1) 512K x 36
8MB	(1) 512K x 36	(1) 512K x 36	(1) 512K x 36	(1) 512K x 36
8MB	(1) 1M x 36	(1) 1M x 36	NONE	NONE
8MB	(1) 2M x 36	NONE	NONE	NONE
10MB	(1) 256K x 36	(1) 256K x 36	(1) 1M x 36	(1) 1M x 36
12MB	(1) 512K x 36	(1) 512K x 36	(1) 1M x 36	(1) 1M x 36
12MB	(1) 1M x 36	(1) 2M x 36	NONE	NONE
16MB	(1) 1M x 36	(1) 1M x 36	(1) 1M x 36	(1) 1M x 36
16MB	(1) 2M x 36	(1) 2M x 36	NONE	NONE
16MB	(1) 4M x 36	NONE	NONE	NONE
18MB	(1) 256K x 36	(1) 256K x 36	(1) 2M x 36	(1) 2M x 36
20MB	(1) 512K x 36	(1) 512K x 36	(1) 2M x 36	(1) 2M x 36
20MB	(1) 1M x 36	(1) 4M x 36	NONE	NONE
24MB	(1) 1M x 36	(1) 1M x 36	(1) 2M x 36	(1) 2M x 36
24MB	(1) 2M x 36	(1) 4M x 36	NONE	NONE
32MB	(1) 2M x 36	(1) 2M x 36	(1) 2M x 36	(1) 2M x 36
32MB	(1) 4M x 36	(1) 4M x 36	NONE	NONE
32MB	(1) 8M x 36	NONE	NONE	NONE
34MB	(1) 256K x 36	(1) 256K x 36	(1) 4M x 36	(1) 4M x 36
36MB	(1) 512K x 36	(1) 512K x 36	(1) 4M x 36	(1) 4M x 36
36MB	(1) 1M x 36	(1) 8M x 36	NONE	NONE
40MB	(1) 1M x 36	(1) 1M x 36	(1) 4M x 36	(1) 4M x 36
40MB	(1) 2M x 36	(1) 8M x 36	NONE	NONE
48MB	(1) 2M x 36	(1) 2M x 36	(1) 4M x 36	(1) 4M x 36
48MB	(1) 4M x 36	(1) 8M x 36	NONE	NONE
64MB	(1) 4M x 36	(1) 4M x 36	(1) 4M x 36	(1) 4M x 36
64MB	(1) 8M x 36	(1) 8M x 36	NONE	NONE
64MB	(1) 16M x 36	NONE	NONE	NONE
66MB	(1) 256K x 36	(1) 256K x 36	(1) 8M x 36	(1) 8M x 36
68MB	(1) 512K x 36	(1) 512K x 36	(1) 8M x 36	(1) 8M x 36
68MB	(1) 1M x 36	(1) 16M x 36	NONE	NONE
72MB	(1) 1M x 36	(1) 1M x 36	(1) 8M x 36	(1) 8M x 36
72MB	(1) 2M x 36	(1) 16M x 36	NONE	NONE

DRAM CONFIGURATION (CON’T)
Size	Bank 0	Bank 1	Bank 2	Bank 3
80MB	(1) 2M x 36	(1) 2M x 36	(1) 8M x 36	(1) 8M x 36
80MB	(1) 4M x 36	(1) 16M x 36	NONE	NONE
96MB	(1) 4M x 36	(1) 4M x 36	(1) 8M x 36	(1) 8M x 36
96MB	(1) 8M x 36	(1) 16M x 36	NONE	NONE
128MB	(1) 8M x 36	(1) 8M x 36	(1) 8M x 36	(1) 8M x 36
128MB	(1) 16M x 36	(1) 16M x 36	NONE	NONE

CACHE CONFIGURATION
Size	Bank 0	Bank 1	TAG
64KB	(8) 8K x 8	NONE	(1) 8K x 8
128KB	(8) 8K x 8	(8) 8K x 8	(1) 8K x 8
256KB	(8) 32K x 8	NONE	(1) 8K x 8
512KB	(8) 32K x 8	(8) 32K x 8	(1) 32K x 8
512KB	(8) 64K x 8	NONE	(1) 32K x 8
1MB	(8) 64K x 8	(8) 64K x 8	(1) 32K x 8
1MB	(8) 128K x 8	NONE	(1) 32K x 8
2MB	(8) 128K x 8	(8) 128K x 8	(1) 128K x 8

CACHE JUMPER CONFIGURATION
Size	JP10	JP11	JP12	JP13	JP14
64KB	Open	Open	1 & 2	Open	Open
128KB	Open	Open	2 & 3	1 & 2	Open
256KB	Open	Open	1 & 2	1 & 2	1 & 2
512KB	Open	Open	2 & 3	2 & 3	1 & 2
512KB	Open	1 & 2	1 & 2	Open	1 & 2
1MB	Open	2 & 3	2 & 3	2 & 3	1 & 2
1MB	1 & 2	2 & 3	1 & 2	2 & 3	1 & 2
2MB	2 & 3	2 & 3	2 & 3	2 & 3	1 & 2
Note: Pins designated should be in the closed position.

CPU SPEED CONFIGURATION
Speed	JP5	JP6	JP7
50MHz	pins 2 & 3 closed	pins 1 & 2 closed	pins 1 & 2 closed
60MHz	pins 1 & 2 closed	pins 2 & 3 closed	pins 1 & 2 closed
66MHz	pins 2 & 3 closed	pins 1 & 2 closed	pins 2 & 3 closed

VESA WAIT STATE CONFIGURATION
Wait states	JP15
0 wait states	pins 1 & 2 closed
1 wait state	pins 2 & 3 closed

BUS SPEED CONFIGURATION
CPU speed	JP16
<= 33MHz	pins 1 & 2 closed
> 33MHz	pins 2 & 3 closed

VESA SYNC/ASNYC CONFIGURATION
Type	JP8	JP9
Synchronous (from chipset)	Closed	pins 1 & 2 closed
Asynchronous( from OSC)	Open	pins 2 & 3 closed