MITAC INTERNATIONAL CORPORATION
PB5400S
|
Processor |
Pentium |
|
Processor Speed |
75/90/100/120/133/150/166MHz |
|
Chip Set |
SIS |
|
Video Chip Set |
None |
|
Maximum Onboard Memory |
128MB (EDO supported) |
|
Maximum Video Memory |
None |
|
Cache |
256/512KB |
|
BIOS |
Award |
|
Dimensions |
330mm x 218mm |
|
I/O Options |
32-bit PCI slots (4), floppy drive interface, green PC connector, IDE interfaces (2), parallel port, PS/2 mouse port, serial ports (2), VGA feature connector, VGA connector, cache slot, IR connector |
|
NPU Options |
None |
|
CONNECTIONS | |||
|
Purpose |
Location |
Purpose |
Location |
|
VGA feature connector |
CO1 |
Reset switch |
J13 |
|
VGA connector |
CO2 |
Turbo LED |
J14 |
|
PS/2 mouse port |
J1 |
Green PC connector |
J15 |
|
Serial port 2 |
J5 |
IDE interface LED |
J16 |
|
Serial port 1 |
J6 |
Turbo switch |
J17 |
|
Parallel port |
J7 |
Speaker |
J18 |
|
Floppy drive interface |
J8 |
Power LED & keylock |
J19 |
|
IDE interface 2 |
J9 |
IR connector |
JP1 |
|
IDE interface 1 |
J10 |
32-bit PCI slots |
PC1 - PC4 |
|
External battery |
J12 |
Cache slot |
SL1 |
|
Note: J1 may not be present on all boards. | |||
|
USER CONFIGURABLE SETTINGS | |||
|
Function |
Label |
Position | |
|
» |
CMOS memory normal operation |
JP14 |
Pins 1 & 2 closed |
|
CMOS memory clear |
JP14 |
Pins 2 & 3 closed | |
|
DRAM CONFIGURATION | ||
|
Size |
Bank 0 |
Bank 1 |
|
2MB |
(2) 256K x 32 |
None |
|
4MB |
(2) 512K x 32 |
None |
|
4MB |
(2) 256K x 32 |
(2) 256K x 32 |
|
8MB |
(2) 1M x 32 |
None |
|
8MB |
(2) 512K x 32 |
(2) 512K x 32 |
|
16MB |
(2) 2M x 32 |
None |
|
16MB |
(2) 1M x 32 |
(2) 1M x 32 |
|
32MB |
(2) 4M x 32 |
None |
|
32MB |
(2) 2M x 32 |
(2) 2M x 32 |
|
64MB |
(2) 8M x 32 |
None |
|
64MB |
(2) 4M x 32 |
(2) 4M x 32 |
|
128MB |
(2) 8M x 32 |
(2) 8M x 32 |
|
Note: Board accepts EDO memory. Banks are interchangeable. | ||
|
CACHE CONFIGURATION | ||
|
Size |
Bank 0 |
SL1 |
|
256KB |
(2) 32K x 32 |
Not installed |
|
256KB |
None |
256KB module installed |
|
512KB |
(2) 32K x 32 |
256KB module installed |
|
Note: The location of Bank 0 is unidentified. | ||
|
CACHE JUMPER CONFIGURATION | |
|
Size |
JP5 |
|
256KB |
Pins 1 & 2 closed |
|
512KB |
Pins 2 & 3 closed |
|
CPU SPEED SELECTION | ||||||
|
CPU speed |
Clock speed |
Multiplier |
JP2 |
JP3 |
JP4 |
JP10 |
|
75MHz |
50MHz |
1.5x |
2 & 3 |
2 & 3 |
Open |
Open |
|
90MHz |
60MHz |
1.5x |
1 & 2 |
2 & 3 |
Open |
Open |
|
100MHz |
66MHz |
1.5x |
2 & 3 |
1 & 2 |
Open |
Open |
|
120MHz |
60MHz |
2x |
1 & 2 |
2 & 3 |
Open |
1 & 3 |
|
133MHz |
66MHz |
2x |
2 & 3 |
1 & 2 |
Open |
1 & 3 |
|
150MHz |
60MHz |
2.5x |
1 & 2 |
2 & 3 |
Open |
1 & 3, 2 & 4 |
|
166MHz |
66MHz |
2.5x |
2 & 3 |
1 & 2 |
Open |
1 & 3, 2 & 4 |
|
Note: Pins designated should be in the closed position. | ||||||
|
CPU VOLTAGE SELECTION | |
|
Voltage |
JP11 |
|
STD/VR |
Pins 2 & 3 closed |
|
VRE |
Pins 1 & 2 closed |