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COMPATIBILITY CONFIGURATION
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Setting
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JP5 pins 1 & 2
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JP5 pins 3 & 4
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Channel ready signal generated after command signal
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Open
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Open
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Channel ready signal generated after bus address latch
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Closed
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Open
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I/O 16-bit signal generated after I/O read or I/O write signals
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Open
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Closed
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I/O 16-bit only on address decode
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Open
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Open
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